Silent Promotion

Two cores, one 64-byte line holding X. No other core caches it at the start.

step	operation	core 0	core 1
1	core 0 reads `X`	E	I
2	core 0 writes `X`	M	I
3	core 1 reads `X`	S	S
4	core 1 writes `X`	I	M

Select every statement that is true of this trace. More than one applies.

Step 4 is a Request For Ownership: core 1 has to invalidate core 0's copy before it may write.

Step 2 writes X through to main memory, because a line marked Modified is required to be coherent with DRAM.

Step 2 needs no message on the bus: Exclusive already means no other cache holds the line, so the local write can promote it to Modified silently.

At step 3 core 0 must supply the line contents itself, because its copy is dirty and main memory is stale.

Step 1 should be Shared rather than Exclusive, since a clean line is by definition shareable and Shared is where clean lines start.