Instruction Encoding: CISC vs RISC

What is a key difference between CISC (x86) and RISC (ARM) instruction encoding that affects pipeline design?

CISC can only address memory; RISC can only operate on registers

CISC instructions are always faster to execute than RISC

CISC has variable-length instructions; RISC has fixed-length instructions

RISC uses more transistors than CISC for the same operations